Sahar Bastanirad is an ASIC Digital Design Engineer currently employed at Synopsys Inc since 2025. Previously, they contributed to AMD from 2021 to 2025 as a Senior Design Engineer and Member of Technical Staff, specializing in high-speed SerDes design and next-generation memory interfaces. Sahar's earlier experience includes research and teaching assistant roles at the University of Ontario Institute of Technology from 2013 to 2015, where they developed algorithms and simulation platforms. They hold a Master’s Degree in Electrical, Electronics, and Communications Engineering from the University of Ontario Institute of Technology and a Bachelor of Science in Electrical Engineering from Shahid Beheshti University.
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Toronto, Canada
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