¼Ñ¶G çà has extensive work experience in the field of verification engineering. They started their career as a Design Verification Engineer at ÐÅԴͨ¿Æ¼¼(Î÷°²)ÓÐÏÞ¹«Ë¾ in 2009 and worked there until 2011. In this role, they were responsible for RTL and gate-level verification code for Intel-based chip validation, as well as software testing and bug analysis on the testing platform.
From 2011 to 2014, ¼Ñ¶G çà worked at Î÷°²»ªÖÞ°ëµ¼ÌåÓÐÏÞ¹«Ë¾ as a Project Verification Manager. Their responsibilities included starting the Verification Organization and leading the verification process for SD/eMMC/SDIO modules. They also performed RTL and gate-level verification for the company's projects.
From 2015 to 2020, ¼Ñ¶G çà worked as a Staff Verification Engineer at Ó¢Ìضû, where they contributed to the verification of SD/eMMC/SDIO modules, RTL, and gate-level verification code. They also performed software testing, bug tracking, and resolution.
In 2020, ¼Ñ¶G çà joined À˳± as a Verification Manager. They continued to lead the verification process and ensure the quality of the company's projects.
In 2021, ¼Ñ¶G çà joined °ºÌضû°ëµ¼Ìå as a Verification Manager, where they are currently serving in that role.
Overall, ¼Ñ¶G çÃ's work experience demonstrates their expertise in verification engineering and their ability to lead verification processes and ensure project quality.
¼Ñ¶G çà completed a Bachelor's degree in Microelectronics at Xidian University from 2004 to 2008. ¼Ñ¶G then pursued a Master's degree in Microelectronics at the same university from 2008 to 2011.
Links
This person is not in the org chart
This person is not in any offices