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Rajesh Kuncha is a skilled engineer specializing in FPGA design and digital signal processing, currently serving as a Sr. FPGA Engineer at Tejas Networks. With a master's degree in Digital Electronics and Communication Systems from Jawaharlal Nehru Technological University, Rajesh possesses extensive knowledge of 3GPP specifications and has developed algorithms for surveillance radar. Prior to this role, Rajesh worked at companies including Mobiveil Inc. and STL - Sterlite Technologies Limited, focusing on LTE physical layer design and FPGA implementation. Rajesh has demonstrated proficiency in various tools such as Vivado, MATLAB, and Vitis IDE, contributing to projects involving beamforming simulations and low PHY chains of radio units.