ÂÜÀòÂÒÂ×

Urvi Mehta is a Senior ASIC Digital Design Engineer at Synopsys Inc, where they have worked since 2021 after progressing from an ASIC Digital Design Engineer II role. Prior to this, Urvi held positions as a Verification Engineer at PerfectVIPs and an Adhoc Assistant Professor at B. H. Gardi College of Engineering and Technology. They completed an M.Tech in VLSI Design at Nirma University and a B.E. in Electronics and Communication Engineering from VVP Engineering College, where Urvi ranked second overall in their discipline. Additionally, Urvi gained valuable experience as a Project Trainee at the Space Application Center (ISRO) in front-end ASIC design and verification.