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Manjesh H N is a Senior Staff ASIC Physical Design Engineer specializing in high-speed SerDes at Synopsys with over 9 years of experience in leading-edge technology nodes. They have previously worked at Intel Corporation as a SoC Design Engineer and contributed to various complex block designs and tapeouts, demonstrating expertise in physical implementation and timing closure. Manjesh earned a Master’s degree in VLSI from NMAM Institute of Technology and has significant experience in chip-level physical implementation across multiple foundries and technologies.