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Dinesh Madusanke is a Lead R&D Engineer at Synopsys Inc, specializing in the acceleration of chip design simulation using FPGAs and GPUs. Previously, Dinesh worked as an Associate Electronic Engineer at Intelligent Machineries International, where contributions included developing a JPEG encoder IP on FPGA. At Synopsys, Dinesh advanced through positions of increasing responsibility, focusing on both FPGA and GPU implementations for RTL simulation and performance improvements for compilers and simulators. Dinesh holds a Bachelor of Science in Electronic and Telecommunication Engineering from the University of Moratuwa.