Jiaqi Cheng is a Senior Staff Design Automation Engineer at MaxLinear. Prior to this, Jiaqi worked as an RF/Analog CAD Engineer at Qualcomm and CAD/Design Automation Engineer at Broadcom. Jiaqi has experience developing PDKs, maintaining physical verification tools, parasitic extraction, and DFM tools. Jiaqi holds a Master's Degree in Electrical, Electronics and Communications Engineering from UC Irvine and a Bachelor's Degree in Automation from Wuhan University.
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