Dr. Saravanan Sethuraman is currently a Principal Engineer and Memory Systems Architect in the Data Center and Artificial Intelligence Group at Intel, where they have been defining future memory standards and developing DDR5 memory subsystems. With 26 years of experience in system architecture and memory technologies, they previously held positions at IBM, leading the development of POWER server memory subsystems. Dr. Saravanan holds over 100 patents and has received numerous awards, including multiple IBM Master Inventor awards and Intel recognition for contributions to the memory field. They are an IEEE Senior Member and have served as a Vice-Chairman in the Bangalore chapter, mentoring many junior engineers along the way. Dr. Saravanan is pursuing a Master of Science in Software Systems and holds a PhD focused on future memory technologies from the Birla Institute of Technology and Science.
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United States
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