Mohana Rao Y is a Senior SoC Lead Design Engineer at Intel India, specializing in semiconductor innovation with a focus on physical design verification and automation. With extensive experience at companies like Qualcomm and Tessolve Semiconductor, they have honed skills in signoff methodologies and process optimization, ensuring manufacturing compliance and high-performance outcomes. Mohana's technical prowess includes expertise in scripting with TCL and Perl, as well as using industry-standard tools such as Cadence and Synopsys to enhance design workflows. They hold a Bachelor's degree in Electrical, Electronics and Communications Engineering from SRSIT.
Location
Bengaluru, India
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