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Syed Jawad Shah is an experienced ASIC Verification Engineer currently employed at DreamBig Semiconductor Inc. since December 2020, contributing to the design and verification of 400G SMARTNIC ICs through the establishment of a System Verilog UVM-based verification environment. Previously, Syed served as an Associate Design Engineer at Lampró Méllon, focusing on digital designing and verification, specifically for bus communication protocols and designing test-bench environments. Prior experience includes a role as a Design Engineer at Tesla Industries, where Syed designed and installed customized solar PV data acquisition systems, along with internships at the National Institute of Electronics Islamabad and 503 Workshop Army Aviation Base Rawalpindi. Syed holds an MS in Electrical Engineering with a focus on Integrated Circuits and Systems from the National University of Sciences and Technology and a BS in Electrical Engineering from Bahria University.