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Viatcheslav Tshikinovski, known as Slava, has extensive experience in hardware development, particularly in FPGA and VLSI/ASIC design. A professional journey includes roles at Vyycore Corporation as a Senior Hardware FPGA Development and Verification Engineer, Intel Corporation as an FPGA Engineer, ARM as a Principal VLSI/ASIC Design Engineer and Team Lead, Corrigent Systems as an FPGA Engineer, and Saifun Semiconductors in verification engineering. Academic qualifications include a Bachelor of Technology in Electrical and Electronic Engineering from Afeka and a Master of Science in Management of Technology from the Holon Institute of Technology. Slava possesses in-depth knowledge of the entire design process, encompassing design specification, algorithmic design, RTL development, and functional verification.