Harini Gogineni has extensive experience in mixed signal verification, currently serving as Manager Design Verification Engineer (AMS) at Analog Devices since October 2021, previously holding the position of Lead AMS Verification Engineer. Prior to this role, Harini worked at Cypress Semiconductor Corporation from March 2016 to October 2021 as Principal Elect Design Engineer and Sr. Staff Elect Design Engineer, focusing on mixed signal verification. Experience also includes a role as Sr. Verification Engineer at PMC-Sierra (August 2013 - February 2016), where significant contributions involved planning and flow development for mixed signal verification tasks. Earlier career stages include a position at Microsemi Corporation as Sr. Verification Engineer (September 2009 - July 2013), specializing in AMS verification and Verilog-AMS model development, and as Member Technical Staff at KPIT Cummins Infosystems Limited (July 2007 - August 2009). Harini Gogineni holds an M.Tech in VLSI-System Design from the National Institute of Technology Warangal, awarded in 2007.
This person is not in the org chart
This person is not in any teams
This person is not in any offices