Sarath Chandra Jonnalagadda is a Design Verification Engineer at AMD, where they have progressed from a co-op intern to a Senior Silicon Design Engineer since 2025. They earned a dual degree in VLSI Design from the Indian Institute of Information Technology Design & Manufacturing Kancheepuram, achieving a CGPA of 8.86/10 between 2018 and 2023. Sarath completed their Intermediate education at Vijaya Ratna Junior College with a score of 961/1000 and also excelled in their X standard at Narayana E-Techno School with a perfect score of 10/10.
Location
Chennai, India
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