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Aurthur Tang is a skilled ASIC Engineering professional with over 15 years of experience in video, audio, and high-speed transceiver design. Currently serving as a PMTS at AMD, they lead silicon design efforts involving PCIe Gen5 integration, while previously holding roles as STA lead and project lead at multiple companies including Xilinx and STMicroelectronics. Aurthur has a strong background in Verilog, System Verilog, and scripting languages like Perl and Python, and is actively pursuing a Bachelor's degree in Electrical Engineering from the University of Illinois at Urbana-Champaign and a Master's degree in Electrical Engineering from Santa Clara University.