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Antonino Di Pasquale is an experienced engineer specializing in digital design and software development. Beginning a career as an FPGA Designer at Ma.Vi. srl during an internship in late 2015, Antonino progressed to roles at the University of Pisa as a Digital Designer for the TRImage European Project and later joined companies such as Xilinx and AMD, where responsibilities included DSP and AI as a Digital Design Senior Engineer II. Notably, contributions to Xilinx involved senior FPGA design and verification. Antonino's academic background features a Master’s Degree in Electronic Engineering from Università di Pisa, achieved with a commendable score of 107/110. Currently, Antonino holds the position of ASIC Sr Staff Design Engineer at Synopsys Inc since October 2024.